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Monitor working with the VexRiscV softcore (IRQs not yet implemented for other cores). Interrupts stop execution to write the data out on UART. Internally saves memory as an array of 32-bit words, layouting of which is given by the generated predefined.h/.c files and decoding of which is provided by decoder.c. The decoder >script< in litebusmonitor/tools/ can be run to capture the serial output of the board and store it in a csv file. Documentation for the different parameters is given as well. There are some larger readouts available, the largest in zipped file format. It holds records of the boot process, starting from the beginning of the BIOS's __main__ method, missing only around 21k bus accesses in the beginning and none afterwards.