Board Clock Times diverge
The Clock times of the different modules (DWD, PWM and LR) diverge. This causes a high SSSP Synchronization offset and ISR critical zone of around ~40 us. Also the DWD crashes. The problem intensifies when more apps run on the different boards.
Tested things (on the DWD) are:
- Running without apps
- Running without the DME and DMC apps
- DME App: Uncommenting the QEI, calculate motion and publishing
- DMC App: Changing the HRT Subscriber (MOTIONDATAEVENT) into an NRT, uncommenting the calculations